Title:
光導波路チップの接続構造
Document Type and Number:
Japanese Patent JP6813680
Kind Code:
B2
Abstract:
A connection structure of optical waveguide chips includes a base substrate (2003) in which grooves (2013) are formed, spacer optical fibers (2006) each disposed for a corresponding one of the grooves (2013) and fitted in the groove (2013) while partially projecting from the base substrate (2003), and silica-based PLCs (2001, 2002) that are a plurality of optical waveguide chips in each of which grooves (2007) fitted on the projecting portions of the spacer optical fibers (2006) are formed at positions of an optical waveguide layer (2008) facing the grooves (2013), and each of which is mounted on the base substrate (2003) while being supported by the spacer optical fibers (2006). The silica-based PLCs (2001, 2002) are mounted on the base substrate (2003) such that incident/exit end faces of the optical waveguide layers (2008) face each other.
More Like This:
Inventors:
Kota Shika
Hiroshi Ishikawa
Yuko Kawajiri
Atsushi Aratake
Hiroshi Ishikawa
Yuko Kawajiri
Atsushi Aratake
Application Number:
JP2019523969A
Publication Date:
January 13, 2021
Filing Date:
June 07, 2018
Export Citation:
Assignee:
Nippon Telegraph and Telephone Corporation
International Classes:
G02B6/36; G02B6/122
Domestic Patent References:
| JP2002357731A | ||||
| JP2017032950A | ||||
| JP4216509A | ||||
| JP2008216905A | ||||
| JP2009139474A | ||||
| JP2002277658A | ||||
| JP2007316335A | ||||
| JP2003241009A |
Foreign References:
| US5611014 |
Attorney, Agent or Firm:
Shigeki Yamakawa
Yuzo Koike
Masaki Yamakawa
Yasushi Motoyama
Yuzo Koike
Masaki Yamakawa
Yasushi Motoyama