PURPOSE: To permit the microscopic formation of an electrode by a method wherein a first insulating layer is adhered covering a conductive layer formed on a substrate, a second insulating layer is spin coated thereon in such a way that the surface is flattened, then the whole surface of substrate is etched to expose the conductive layer and a wiring layer is formed covering this exposed part.

CONSTITUTION: A poly Si layer 3 is formed on a P-type Si substrate 1 as a gate electrode through an SiO2 layer 2, then source and drain regions 1A and 1B are formed using the poly Si layer 3 as a mask. An SiO2 layer 5 is adhered on the whole surface of the substrate as a first insulating layer covering the poly Si layer 3 by thermal oxidation and an SOG layer is adhered on the substrate as a second insulating layer covering the SiO2 layer 5 by a spin coating method on condition that the substrate is roughly flattened and thereafter, is heated and solidified at about 150°C. Then, the whole surface of substrate is subjected to dry etching, the surface of the poly Si layer 3 is exposed and an Al layer 7 is formed as a wiring layer covering the exposed surface of the poly Si layer 3.