To prevent an output charge amount from being affected by clock jitter by outputting a predetermined correct amount of charge to the input of one clock signal.
A current mirror circuit includes transistors M1 and M2, a switch SW1 is turned on after turning off a switch SW2 from a state where the switch SW1 is turned off and the switch SW2 is turned on, and charge corresponding to charge to be charged to a capacitor C1 is output from the transistor M2. A term when the switch SW1 is turned on and the switch SW2 is turned off is controlled so as to be longer than a time when voltage of both ends of the capacitor C1 is charged to voltage obtained by subtracting threshold voltage of the transistor M1 from a potential difference between VDD and GND.
WAKUI TSUTOMU
JPS5160135A | 1976-05-25 | |||
JP2005039445A | 2005-02-10 | |||
JPH0589265A | 1993-04-09 | |||
JPH02104025A | 1990-04-17 | |||
JP2001119299A | 2001-04-27 |