Title:
CONTROL CIRCUIT BY DELTA-SIGMA PULSE WIDTH MODULATOR
Document Type and Number:
Japanese Patent JP3262760
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a delta-sigma pulse width modulator adapted for mounting in a digital integrated circuit by reducing the harmonic noises.
SOLUTION: This delta-sigma pulse width moldulator control circuit 103 adopts a delta-sigma modulator 201 as a first stage and generates a series of pulses representing an input control signal. A pulsewidth modulator 205 weights the respective pulses, accumulates a series of weighted pulses, and generates an output signal to be pulsewidth modulated from the accumulated pulses. The signal pulse width modulated is given by an offset generated at random for the time of a transition of a pulse value. Then, a matching technique of its adjacent pulse value is used to reduce the noise relative to harmonic waves.
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Inventors:
Richard S. Luisson
Application Number:
JP28954398A
Publication Date:
March 04, 2002
Filing Date:
October 12, 1998
Export Citation:
Assignee:
HEWLETT-PACKARD COMPANY
International Classes:
H02M3/00; H02M1/08; H03K7/08; H03M1/08; H03M3/02; (IPC1-7): H02M1/08; H02M3/00; H03M1/08
Domestic Patent References:
| JP1132488A |
Attorney, Agent or Firm:
Kaoru Furuya (2 outside)
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