Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
CONTROL CIRCUIT GENERATING DEVICE
Document Type and Number:
Japanese Patent JPH05334391
Kind Code:
A
Abstract:

PURPOSE: To generate an efficient control sequence by deciding whether or not an arithmetic node and a storage element node can share the same computing element and register and performing scheduling which utilizes the result.

CONSTITUTION: This control circuit generating device has a control data flow graph reading device 2 which reads a control data flow graph 1 in, an execution condition code generating device 3 which grants the execution conditions of arithmetic in the graph to each arithmetic operation, a scheduling device 4 which schedules the respective arithmetic operations, and a control sequence generating device 5 which generates a control circuit 6. The control data flow graph 1 is read in by the control data flow graph reading device 2, the arithmetic execution condition code generating device 3 grants arithmetic execution condition codes to the respective arithmetic operations in conditional branches of the graph, and the control sequence generating circuit 5 generates control sequences, condition by condition, by utilizing the codes and outputs the control circuit for the output of the scheduling device 4.


Inventors:
WAKABAYASHI KAZUTOSHI
Application Number:
JP14122692A
Publication Date:
December 17, 1993
Filing Date:
June 02, 1992
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NEC CORP
International Classes:
G06F17/50; G06F19/00; (IPC1-7): G06F15/60; G06F15/20
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)



 
Previous Patent: JPS5334390

Next Patent: JPS5334392