Title:
制御回路
Document Type and Number:
Japanese Patent JP6857587
Kind Code:
B2
Abstract:
Disclosed is a signal processing circuit including an analog-to-digital converter, an arithmetic processing unit electrically connected to the analog-to-digital converter, and a first register electrically connected to the arithmetic processing unit. The extremely small off-state current of a transistor included in the first register allows the first register to retain a signal output from the arithmetic processing unit. This structure enables stationary driving of a load even if the signal processing circuit is turned off, which contributes to a reduction in power consumption of an electronic device having the load.
Inventors:
Kei Takahashi
Application Number:
JP2017198166A
Publication Date:
April 14, 2021
Filing Date:
October 12, 2017
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H03K7/08; H05B44/00
Domestic Patent References:
| JP2012019682A | ||||
| JP2012010574A | ||||
| JP2011135759A | ||||
| JP2009225649A | ||||
| JP2006280138A |