Title:
制御装置
Document Type and Number:
Japanese Patent JP7312127
Kind Code:
B2
Abstract:
Included are: a storage unit that is capable of latching data having different acquisition timings; and an input control circuit that controls, for each of a plurality of processing devices, whether or not to input input data, which is transmitted from a control target apparatus, to the processing device in response to an input request from the processing device to the control target apparatus. An information difference caused by an acquisition timing difference is eliminated to be made into input data by latching the data in the storage unit. Identity determination on each piece of output data or majority decision is adopted as a determination criterion. In the identity determination, it is determined that there is a malfunction in a case where there is a non-identical combination between the output data. The majority decision is applied to a case where the output data has three or more systems, and whether there is a malfunction is determined based on a result of the majority decision.
Inventors:
Kotaro Shimamura
Naohiro Ikeda
Naohiro Ikeda
Application Number:
JP2020027625A
Publication Date:
July 20, 2023
Filing Date:
February 20, 2020
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
G05B9/03; G05B9/02; G06F11/18
Domestic Patent References:
| JP201946274A | ||||
| JP2012133610A | ||||
| JP2003140704A | ||||
| JP9218797A |
Attorney, Agent or Firm:
Patent Attorney Corporation Sunnext International Patent Office