PURPOSE: To attain surely the operation and stop of decoding for a reception signal and to prevent the generation of unpleasant sound by providing a 1-bit synchronoizing supervisory bit to one frame in the transmission of a voice analysis data and stopping the voice synthesizing by the detection of an end signal and the measurement of an error rate of the synchronizing supervisory bit.
CONSTITUTION: A synchronizing signal detection circuit 16 detects a synchronizing signal at the start of transmission, an end detection circuit 17 detects an end signal and separates the synchronizing supervisory bit provided to one frame of the analysis data to measure the error rate. When the end signal is detected and the error rate of the synchronization supervisory bit is a prescribed value or below, the end of detection is instructed to a control circuit 18. When the detector 16 detects the synchronizing signal, the control circuit 18 matches the reception frame timing of the register 12 at its detection position and activates a pulse register 13. When the detection is detected, the pulse generator 13 is stopped. Thus, the operation and stop of the decoding (voice synthesis) at the reception side are ensured and the generation of unpleasant noise due to noise is prevented.
FUKAMI AKEMASA
ISHIZU TATSUO
| JPS6028700A | 1985-02-13 | |||
| JPS59212087A | 1984-11-30 | |||
| JPS59215139A | 1984-12-05 |
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