Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
CONTROL SIGNAL COMPENSATION METHOD, COMPENSATION CONTROL SYSTEM AND ANALOG/DIGITAL PROCESSING SYSTEM
Document Type and Number:
Japanese Patent JPH11168381
Kind Code:
A
Abstract:

To compensate the effect of correction waiting time without reducing a loop gain by storing correction executed by a controller and permitting the controller to execute evaluation with a monitor circuit connected to the controller.

A correction value added to a control loop is stored so that the value can be used without waiting for the transmission of the correction through the control loop. A compensation control system 11 contains a controller 5 and the monitor circuit 4, which are connected in series. The monitor circuit 4 has a local feed back loop 12 parallel to the regular correction flow of the compensation control system so that additional waiting time is not introduced. The compensation circuit 14 receives a detected signal In and transmits a compensation signal Φn at time t=nt (T is clock period). The compensation circuit 14 connects the compensation signal Φn to plural adder nodes Σ2 through an adder node, plural delay blocks and plural reduced connection blocks, which are connected in series.


Inventors:
DATI ANGELO
BIETTI IVAN
Application Number:
JP22982498A
Publication Date:
June 22, 1999
Filing Date:
August 14, 1998
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SGS THOMSON MICROELECTRONICS
International Classes:
G05B5/01; G05B21/02; H03L7/06; H03M1/12; (IPC1-7): H03M1/12
Attorney, Agent or Firm:
Soga Doteru (6 people outside)



 
Previous Patent: NOISE ELIMINATION CIRCUIT

Next Patent: CURRENT COMPARATOR