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Title:
CONTROL STORAGE DEVICE
Document Type and Number:
Japanese Patent JPS57203142
Kind Code:
A
Abstract:

PURPOSE: To modify an optional part in an ROM by a simple circuit by switching part of a page address to a page address modified into a specific bit pattern when the page address indicates the ROM.

CONSTITUTION: On the basis of address information consisting of page addresses PA100WPA102, a segment address SA103, and a word address WA104, an ROM is accessed to output a μ instruction 105. A read and write memory RWM1 is accessed by the PAs and SA to output a modification SA201 and a modification indication bit 202. When the high-order digit bit 100 of the PA is O to indicate the ROM, a PA switching circuit MPX2 outputs a specific bit pattern 500 for specifying a modified segment area as a modification PA501 to access the RWM2 by the low-order digit bit 102 of the PA, SA201, and WA104 together. For example, all bits of the pattern 500 are set to 1s to use part of the RWM2 as a modified segment, thereby outputting the output μ instruction 301 of the RWM2 from a MPX1.


Inventors:
OCHI YUKIYOSHI
Application Number:
JP8900181A
Publication Date:
December 13, 1982
Filing Date:
June 10, 1981
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F9/22; G06F9/06; G06F9/26; G06F12/06; (IPC1-7): G06F9/22; G06F13/00; G11C9/06



 
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