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Patent Searching and Data


Title:
CONTROL SYSTEM FOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS553082
Kind Code:
A
Abstract:

PURPOSE: To avoid the overrun of the memory medium in case the computer is combined with the medium rotary-type memory device featuring a higher speed than the operation speed of the computer, by performing the address distribution for the memory medium in accordance with the process time of the computer.

CONSTITUTION: Memory device 3 features a higher speed than the operation of computer 1 and possesses the memory medium featuring the substantially endless turns. Control unit 2 controls the data transfer between computer 1 and device 3. In this case, the access is given at intervals and with a proper space corresponding to the process time of each block computer of the memory medium. At the same time, first-in/first-out memory 201 is installed between computer 1 and device 3 as the data transfer buffer, and thus the data is transferred through memory 201 with every block of the memory medium. As a result, the overrun can be prevented with a highly efficient use of the memory device secured.


Inventors:
FUKAI YOSHIJI
KUBO NORIO
Application Number:
JP7615878A
Publication Date:
January 10, 1980
Filing Date:
June 23, 1978
Export Citation:
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Assignee:
YOKOGAWA ELECTRIC WORKS LTD
International Classes:
G06F3/06; (IPC1-7): G06F13/04; G11D1/00
Domestic Patent References:
JP34004372A
JPS4882811A1973-11-06
JPS4975233A1974-07-19
JPS4736931A