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Title:
CONTROL SYSTEM FOR READ ONLY MEMORY AFTER CHARGING POWER SOURCE
Document Type and Number:
Japanese Patent JP01165094
Kind Code:
A
Abstract:

PURPOSE: To execute without a stand-by except the writing to a ROM by guiding out a highly accurate writing command signal to the ROM based on a clock pulse only when the level of the clock pulse is higher than a discriminating level in response to the output of a level discriminator.

CONSTITUTION: When the power is charged, an address signal and a data signal are outputted from a processing circuit 3 to decide whether the clock pulse outputted from a clock pulse generating circuit 7 can be counted or not. When the clock pulse is higher than the predetermined discriminating level, a threshold level, what is called, a control circuit 5 can count the clock pulses. When the clock pulses can be counted, the circuit 5 writes data to a P-ROM 6. In such a way, an electronic cash register 1 can freely process except writing to the P-ROM 6 immediately after the power is charged. Further, the writing can be executed without waiting for a long time.


Inventors:
Sakuma, Hideaki
Application Number:
JP1987000324860
Publication Date:
June 29, 1989
Filing Date:
December 21, 1987
Export Citation:
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Assignee:
SHARP CORP
International Classes:
G11C17/00; G06F9/22; G07G1/12; G11C5/14; G11C11/41; G11C16/02; G11C16/10; G11C16/22; G11C16/32; G11C17/18; (IPC1-7): G06F9/22; G11C11/34; G11C17/00



 
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