Title:
CONTROLLER OF POWER SOURCE
Document Type and Number:
Japanese Patent JPS58166410
Kind Code:
A
Abstract:
PURPOSE:To limit a rush current during AC input recovery securely and to let a load know a faulty AC input securely by sending out a fault detection signal to a load logical device and resetting a time constant circuit a specific time later. CONSTITUTION:When an AC input is broken, an AC input decrease and instantaneous break detecting circuit 1 detects it with specific time delay and sends out an AC instantaneous break detection signal to the logical device 7. Further, a delay circuit 8 inputs a reset signal to the time constat circuit 5' with some time delay to reset the circuit, thereby turning off an ON/OFF signal. When the ON/OFF signal is turned off, a short-circuited circuit is opened to turn off the DC output. The AC input decrease and instantaneous break detection signal is reset a little bit after the AC input recovers and the reset signal is also reset a little bit later through the delay circuit 8; and then the time constant circuit 5' starts operating to turns on the ON/OFF signal a specific time later.
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Inventors:
INABA KATSUHIKO
Application Number:
JP5031382A
Publication Date:
October 01, 1983
Filing Date:
March 29, 1982
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
G05F1/10; H02H11/00; (IPC1-7): G05F1/12
Domestic Patent References:
| JPS5152038U | 1976-04-20 | |||
| JPS5742415B2 | 1982-09-08 |
Attorney, Agent or Firm:
Sugano Naka