PURPOSE: To expand a timing margin and to quicken an operation by writing a synchronous signal and shifting it by a shift register, outputting a clock pulse shifted by one period each so as to allow a flip-flop to latch sequentially an input serial data.

CONSTITUTION: A flip-flop group (FFA) 3 is easily latched because outputs 35-38 are unchanged in the vicinity of a timing when a transit register (TRANR) 4 latch the outputs 35-38 of the FFA 3. Then an output stage register (OUTR) 5 latches latter half outputs 23-26 in the outputs 19-22 of the TRANR 4 and the outputs of the FFA 3 in a latch timing 12 outputted by a timing generating shift register (TGSFR) 2. Thus, parallel data outputs (PDO) 27-34 are outputted. Since the outputs 19-26 are stable in the vicinity of the latch timing 12, the OUTR 5 is easily latched.