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Title:
D/A CONVERTER DEVICE
Document Type and Number:
Japanese Patent JP3150537
Kind Code:
B2
Abstract:

PURPOSE: To effectively attenuate high frequency component included in a digital signal by outputting a signal which is average-moved with respect to the digital input signal of one bit in the constitution of delaying or inverting one of the control signals of a switch.
CONSTITUTION: The switch 11 connects with the side of (a), namely connects the one terminal of a capacitor 13 to a reference voltage source when a control signal &phiv 1 is one and connects with a ground side (b) when &phiv 1d is zero. On the other hand, a switch 12 connects with the side of (a) when a control signal &phiv 2 is one and with the ground side (b) when &phiv 2 is zero. Then, the control signal &phiv 1d is delayed by half synchronization of the control signal &phiv 2. Thereby the analog output signal of an integration circuit 16 becomes a code contrary to the output signal of the switch 11. Namely, the analog output signal of the analog integration circuit 16 is obtained by calculating the running mean of the last two values of the digital input signal and inverting a code. Consequently, the frequency characteristic of an output amplitude attenuates largely near Nyquist frequency.


Inventors:
Yasunori Tani
Tomihiko Fukumoto
Tetsuhiko Kanaaki
Akira Sobajima
Hideaki Hatanaka
Application Number:
JP15774194A
Publication Date:
March 26, 2001
Filing Date:
July 11, 1994
Export Citation:
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Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H03M1/08; H03H19/00; H03M1/00; H03M3/02; (IPC1-7): H03M3/02; H03H19/00; H03M1/08
Domestic Patent References:
JP3296324A
JP6303143A
JP5175787A
JP537383A
Attorney, Agent or Firm:
Yoshihiro Morimoto



 
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