To provide a D/A converter that reduces an effect of noise in a negative supply voltage generated by a charge pump circuit for use as a second reference signal Vref_L.
The D/A converter includes: a sampling circuit 160 including a digital section for inputting a digital signal, a sample-and-hold circuit 150b including a plurality of capacitors 111p_1, 111p_2, 111n_1, 111n_2 and a plurality of switching elements 151p_1, 151p_2, 151n_1, 151n_2, 153n_1, 153n_2, 102_1, 102_2, for sampling input signals based on the input digital signal and holding and transferring the sampled signals, and a continuous section 150a for outputting the transferred signals as analog signals; and a clock signal supply section 159 for supplying a first clock signal φI to the continuous section and supplying second clock signals φS3, φS4 to the sample-and-hold section.
| JPH08298461 | D/A CONVERTER |
| JP3814275 | DIGITAL/ANALOG CONVERTER WITH LOW SKEW AND GLITCH |
| WO/2006/067382 | DIGITAL TO ANALOGUE CONVERSION |
NAKANISHI JUNYA
| JPH01140810A | 1989-06-02 | |||
| JPH0420017A | 1992-01-23 | |||
| JPS63269831A | 1988-11-08 |
Megumi Konishi
Hide Tanaka Tetsu
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