To provide a pipeline type A/D converter in which increased precision and reduced power consumption are attained by simple structure.

The A/D converter which converts an analog signal into a digital signal by alternately operating a first circuit and a second circuit is equipped with a detection circuit which detects difference in output signals between the first circuit and the second circuit and a compensation circuit which forms an output signal by adding the difference to the output signal of the first circuit or the second circuit. The detection circuit detects and holds an absolute value of the difference between a first output signal of the first circuit and a second output signal of the second circuit corresponding to the same analog signal in a set training period. The compensation circuit adds the held difference to a smaller output signal of the first signal or the second signal, forms and outputs an output signal of the maximum value by a carry-over signal of its adding result in an operation period for converting the analog signal into the digital signal.

COPYRIGHT: (C)2007,JPO&INPIT