Title:
A/D CONVERTER
Document Type and Number:
Japanese Patent JP3047054
Kind Code:
B2
Abstract:
PURPOSE: To realize the A/D converter whose quantization error is reduced with simple circuit configuration while employing an D/A converter circuit with less number of bits.
CONSTITUTION: The converter is featured to be provided with a dither signal source 8, analog adders 1, 2 superimposing a dither signal and an input signal, A/D converter circuits 3, 4 ADD-converting the signal, a subtractor 5 adding the differential signals, an arithmetic operation processing circuit applying arithmetic operation processing to the output of the subtractor 5, a 2nd dither signal source 13, analog adders 9,10 superimposing the 2nd dither signal onto the input signal and an analog adder 14 superimposing directly the signal from the 2nd dither signal source 13 onto the input signal.
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Inventors:
Shusaku Shimada
Application Number:
JP3513492A
Publication Date:
May 29, 2000
Filing Date:
February 21, 1992
Export Citation:
Assignee:
Yokogawa Electric Corporation
International Classes:
H03M1/20; (IPC1-7): H03M1/20
Domestic Patent References:
| JP62230121A | ||||
| JP2134010A | ||||
| JP58168323A |