Title:
コプレーナ線路及びその製造方法
Document Type and Number:
Japanese Patent JP5476854
Kind Code:
B2
Abstract:
A coplanar waveguide includes a high resistance silicon substrate having one primary surface on which an amorphous silicon layer is formed, an insulated layer formed on the amorphous silicon layer, a signal line arranged on the insulated layer and a pair of ground planes arranged on the insulated layer so as to put the signal line between the planes. The coplanar waveguide is not structured as conventionally having a thick insulated layer formed on a single-crystalline silicon substrate, thereby reducing attenuation otherwise caused by leakage of electromagnetic wave in a frequency bandwidth of millimeter wave.
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| JP2000510299 | [Title of Invention] Coplanar Waveguide Coupler |
Inventors:
Takehiko Makida
Application Number:
JP2009190981A
Publication Date:
April 23, 2014
Filing Date:
August 20, 2009
Export Citation:
Assignee:
Oki Electric Industry Co., Ltd.
International Classes:
H01P3/02; H01P11/00
Other References:
B.Rong et al.,"Surface-Passivated High-Resistivity Silicon Substrates for RFICs",IEEE ELECTRON DEVICE LETTER,2004年 4月,Vol.25,No.4,pp.176-178
W.Zhao,et al.,"Aluminum Metal-Insulator-Metal Connections for Coplanar Waveguide",Silicon Monolithic Integrated Circuits in RF Systems 2000 Digest of Papers 2000 Topical Meeting on,2000年,pp.87-90
槇田毅彦(ほか3名),「高抵抗シリコン基板上低損失コプレーナ線路の構造」,電子情報通信学会技術研究報告.MW,2009年 1月 7日,Vol.108,No.377,pp.65-70,MW2008-174
W.Zhao,et al.,"Aluminum Metal-Insulator-Metal Connections for Coplanar Waveguide",Silicon Monolithic Integrated Circuits in RF Systems 2000 Digest of Papers 2000 Topical Meeting on,2000年,pp.87-90
槇田毅彦(ほか3名),「高抵抗シリコン基板上低損失コプレーナ線路の構造」,電子情報通信学会技術研究報告.MW,2009年 1月 7日,Vol.108,No.377,pp.65-70,MW2008-174
Attorney, Agent or Firm:
Takashi Ogaki
Hiroyuki Okada
Hiroyuki Okada