Title:
COUNTER CIRCUIT, ANALOG/DIGITAL CONVERTER, APPARATUS WITH COUNTER CIRCUIT AND ANALOG/DIGITAL CONVERTER, COUNTING METHOD AND ANALOG/DIGITAL CONVERSION METHOD
Document Type and Number:
Japanese Patent JP2011071995
Kind Code:
A
Abstract:
To provide a counter circuit, apparatus including the same and counting method.
A counter circuit includes a buffer section and a ripple counter. The buffer section generates at least one lower-bit signal by latching at least one input clock signal from an ending time point of a counting operation. The ripple counter generates a higher bit signal for sequential toggling in response to latch output signals corresponding to one of lower bit signals. The counter circuit has an improved operating speed and operating margin by carrying out counting twice or more for each cycle term of the input clock signal, the number of times of toggling the bit signal is decreased and power consumption is reduced.
Inventors:
KIM KYUNG-MIN
KOH KYOUNG MIN
HAN YOON-SEOK
KOH KYOUNG MIN
HAN YOON-SEOK
Application Number:
JP2010216009A
Publication Date:
April 07, 2011
Filing Date:
September 27, 2010
Export Citation:
Assignee:
SAMSUNG ELECTRONICS CO LTD
International Classes:
H03K21/17; H03K23/00; H03M1/56
Domestic Patent References:
| JP2009089066A | 2009-04-23 | |||
| JP2005311933A | 2005-11-04 | |||
| JP2009159331A | 2009-07-16 |
Attorney, Agent or Firm:
Kyosei International Patent Office
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