Title:
COUNTER CIRCUIT
Document Type and Number:
Japanese Patent JP2009218877
Kind Code:
A
Abstract:
To reduce a power consumption in an always-on counter circuit.
A counter circuit has a first counter of m bits which counts values of a predetermined bit width to be stored according to an input clock, a clock transmission control circuit controlling whether or not the input clock is transmitted based on a value output according to the result of the first counter, and a second counter of n bits which counts values of the predetermined bit width to be stored according to the input clock transmitted from the clock transmission control circuit.
Inventors:
ODA YASUHIRO
Application Number:
JP2008060834A
Publication Date:
September 24, 2009
Filing Date:
March 11, 2008
Export Citation:
Assignee:
NEC ELECTRONICS CORP
International Classes:
H03K23/00; H03K21/00; H03K23/40
Domestic Patent References:
JPH07248741A | 1995-09-26 | |||
JPH0388422A | 1991-04-12 | |||
JP2008109563A | 2008-05-08 | |||
JPH0410811A | 1992-01-16 | |||
JPH07248741A | 1995-09-26 |
Attorney, Agent or Firm:
Ken Ieiri
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