PURPOSE: To count a clock number (2N+1) or over even when an N-bit counter is employed by inactivating a counter for a prescribed reference clock period from a point of time when the count is counted up from a 2nd prescribed value smaller than a 1st prescribed value.

CONSTITUTION: The counter circuit is provided with a counter 11 set to a prescribed initial value at the reset state, counting up an N-bit count at every detection of the edge of a said reference clock at the active state by one and fixing the count in the inactive state, and with a count control means (comprising flip-flop 13, inverter 14 and OR gate 15) inactivating the counter 11 for a prescribed clock period of the reference clock when the count is counted up to the 1st prescribed value and when the count is counted up to the 2nd prescribed value smaller than the 1st prescribed value for the prescribed clock period of the reference clock.