PURPOSE: To divide a counter circuit into plural counters of an optional bit length by allowing a register group to designate enable/inhibit a carry output A/a level of power supply and count operation of a unit counter group outputting the count result of carry inputs and the carry output A.

CONSTITUTION: Unit counters 101-105 of a 16-bit counter circuit 1 receive a carry input at their input terminals CI and outputs a count result Q and a carry output CO to output terminals Q and CO. In a register circuit 2, 1-bit registers 201-215 output start bit selection signals ST1-15 and count enable signals EN1-15 in response to data D from a data bus 3. The counters 101-105 selects an output CO of a pre-stage unit counter or a level of a power supply VDD in response to signals ST1-15 and execute counting/no counting in response to the signals EN1-EN15. Thus, the 16bit circuit 1 is divided into plural counters of an optional bit.