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Patent Searching and Data


Title:
COUNTER CIRCUIT
Document Type and Number:
Japanese Patent JPS61269419
Kind Code:
A
Abstract:

PURPOSE: To constitute simply an address generating circuit in skipping access of a memory and to improve the degree of integration of a semiconductor integrated circuit by setting the operation of a counter circuit into four states while using a count control signal; sequential count, count of even number only, count of odd number only and count inhibition.

CONSTITUTION: A count permission signal (e) is a signal to control the count counter elements 2, 3 and depends on a carry signal b0 outputted from the counter element 1 and count control signals (c, d) inputted to a count control circuit 4. The count control circuit 4 decides the operation of the counter by count control signals (c, d), inputs a counter element output signal Q0 and the carry signal b0 and outputs the least significant digit output signal Q0a controlled by the count, an enable signal (a) and the count permission signal (e). Depending on the combination of the count control signals (c, d) inputted to the count control circuit 4, the sequential count, the odd number count, the even number count and the count inhibition are set.


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Inventors:
TATEISHI HIROSHI
HIGUCHI KEIZO
Application Number:
JP11142685A
Publication Date:
November 28, 1986
Filing Date:
May 22, 1985
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03K23/00; H03K21/08; (IPC1-7): H03K21/38
Attorney, Agent or Firm:
Masuo Oiwa