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Patent Searching and Data


Title:
COUNTER CONTROLLER
Document Type and Number:
Japanese Patent JPH01269318
Kind Code:
A
Abstract:

PURPOSE: To dispense with a masking register by controlling a device so that initial values are set for some N bits, and simultaneously, the inverted value of the bit in a comparison value to which one bit, at least, other than said N bits corresponds is set for said one bit.

CONSTITUTION: A decoder 4 sends a set signal to a register 9 corresponding to least significant N bits besides the register corresponding to the instructed N bits. Simultaneously with it, the decoder 4 sends a select signal so that selectors 11,12 and 13 select input data 5. Thus, a set value selecting device 6 selects the value of the input data to be selected by the selector 14, and the output of the selector 14 is inputted to the register 9 through the selector 13 in s counter 1, and the set value is set. Therefore, not only the masking register necessitated in the past comes unnecessary, but the control of mask processing comes unnecessary as well.


Inventors:
YONEZAWA NAOMICHI
Application Number:
JP9788588A
Publication Date:
October 26, 1989
Filing Date:
April 20, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03K23/66; H03K21/00; (IPC1-7): H03K23/66
Attorney, Agent or Firm:
Yanagi Shin Kawai