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Patent Searching and Data


Title:
COUNTER DEVICE
Document Type and Number:
Japanese Patent JP01160111
Kind Code:
A
Abstract:

PURPOSE: To attain plural count by applying time division to a count register and a decrementer (or incrementer) so as to use them effectively thereby preventing the increase in the hardware.

CONSTITUTION: Two registers 100, 200, a count register 300 and a decrementer 400 are is use and a data is transferred in time division by using biphase count enable signals comprising a count enable signal ENA and its inverting signal. Thus, the counter is effective in requiring plural counters, and in case of addition of one counter, it is enough to add one register only basically and the constitution suitable for semiconductor circuit integration is obtained.


Inventors:
Ota, Yutaka
Application Number:
JP1987000317485
Publication Date:
June 23, 1989
Filing Date:
December 17, 1987
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03K21/38; H03K23/00; H03K23/58; H03K21/00; H03K23/00; (IPC1-7): H03K21/38; H03K23/58