Title:
COUNTER AND/OR DIVIDING DEVICE
Document Type and Number:
Japanese Patent JPH0750576
Kind Code:
A
Abstract:
PURPOSE: To obtain an arbitrary counting operation or frequency division ratio with low cost and low noise. CONSTITUTION: Signals from data output terminals of flip-flops at least in a part of auxiliary counter circuits 1 and 2 are synthesized in accordance with an AND function by logic elements 10 and 11, and each obtained synthesized signal is supplied to at least one of auxiliary counter circuits as a reset signal for adjusting this auxiliary counter circuit to the initial state, and an output signal is formed from at least one of obtained synthesized signals. The product of the sum total of the flip-flops of entire auxiliary counter circuits is selected, so as to be equal to or larger than a prescribed maximum count or frequency division ratio, and these sum totals are determined so that they do not have common prime factors, and data output terminals of the flip-flops of auxiliary counter circuits connected to logic elements are selected such that the output signal shows a prescribed maximum count or frequency division ratio.
Inventors:
SUWALD THOMAS (DE)
Application Number:
JP4901794A
Publication Date:
February 21, 1995
Filing Date:
March 18, 1994
Export Citation:
Assignee:
KONINKL PHILIPS ELECTRONICS NV (NL)
International Classes:
H03K21/00; H03K23/00; H03K23/40; (IPC1-7): H03K23/00; H03K21/00
Attorney, Agent or Firm:
Akihide Sugimura (5 outside)
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