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Title:
COUNTER FOR THE VARIABLE NUMBER OF STEPPINGS AND ACCESS ADDRESS GENERATING METHOD TO IMAGE MEMORY USING THE COUNTER
Document Type and Number:
Japanese Patent JPH0433411
Kind Code:
A
Abstract:

PURPOSE: To simplify the circuit constitution and to realize the counter for the variable number of steppings whose number of steppings is made variable by bringing only a 2nd counter to a count enable state at all times in the specific case.

CONSTITUTION: Suppose that a 1st counter 1 is always set to a count disable state and a 2nd counter 2 is always set to a count enable state, then every time a clock signal 7 is inputted, a counted value 12 is updated by 2n because the bit weight of a bit LSB 2 is selected to be 2n. When an external setting operating mode signal 6 is in the L state, the external setting operating mode signal 6 acts like a count enable signal 6 and only a carry signal 10 acts like a count enable signal 11 via an OR gate 3 to the counter 2. Thus, the counters 1, 2 act like 2n+m-ary up-counter. Thus, the circuit constitution is simplified and the number of steppings is made variable.


Inventors:
HATA MIKIHIKO
Application Number:
JP13848790A
Publication Date:
February 04, 1992
Filing Date:
May 30, 1990
Export Citation:
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Assignee:
HITACHI COMMUNICATION SYSTEM
International Classes:
G06F12/02; H03K23/64; (IPC1-7): G06F12/02; H03K23/64
Attorney, Agent or Firm:
Masami Akimoto (1 person outside)



 
Next Patent: JPH0433412