PURPOSE: To attain a waveform output whose duty ratio is very close to 50% from one circuit with respect to the circuit outputting a 1/N frequency division waveform obtained from the counter as a waveform whose duty ratio is very close to 50%.
CONSTITUTION: An adder section 12 adds a half of an output of a division section 11 dividing a frequency by 1/N and its residue and outputs the result to a selector section 13. The selector section 13 uses a control signal to select a half of the output of the division section 11 or an output of the adder 12 and gives the selected signal to a counter section 14 as a setting input. A clock generating section 15 outputs a clock output inverted at each transmission of a carrier output from the counter 14 and sends the output as a control signal of the selector 13. Through the constitution above, a waveform whose duty ratio is very close to 50% is obtained with respect to all frequency division numbers.
JPS5460547 | PROGRAMABLE DIVIDER |
JP2008271593 | PLL CIRCUIT |
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