PURPOSE: To reduce noise due to state transition of an FF by devising the bit state to be transited only by a 2-bit Johonson count at maximum in the case of counting the counter.

CONSTITUTION: Two-bit Johonson counters 1, 2 are connected in series to form a 4-bit counter. The count is started at RST=H and the count is started at a trailing of a reference clock CLK. Outputs A1, A0 of the counter 1 are counted as 00, 01, 11, 10... and when the output of the output A1 is 10, the count is carried to the counter 2 at the leading of the reference clock CLK and the counter 2 starts counting. When an inverse of output A1 of a DFF 11 is used for a reference clock of DFFs 12, 13, the state of outputs A3, A2 of the counter 2 is similarly transited as 00, 01, 11, 10.... A maximum of 2-bit is transited simultaneously in the outputs A0-A3. A maximum of N bits is changed for simultaneously in the 2N-bit counter. Thus, noise such as ripple or the like due to state change is reduced.