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Patent Searching and Data


Title:
COUNTER
Document Type and Number:
Japanese Patent JPH05282171
Kind Code:
A
Abstract:

PURPOSE: To provide a counter capable of checking an error so as not to change the number of '1's in all bits of the counter at the time of counting by the counter and easily executing the practical constitution of a circuit.

CONSTITUTION: Plual D-type flop flops(DFF) 1 to 4, 5 to 8 are connected to constitute plural shift registers 51, 52. An OR gate 11 is connected between both the shift registers 51, 52 so that only one DFF circularly stores '1' in each input of a clock to be counted to respective shift registers 51, 52, and only when the uppermost DFF 4 on the slave shift register 51 stores '1', the clock to be measured is inputted to the master shift register 52.


Inventors:
Yutaka High Yuji
Application Number:
JP10568392A
Publication Date:
October 29, 1993
Filing Date:
March 30, 1992
Export Citation:
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Assignee:
SUMITOMO METAL INDUSTRIES,LTD.
International Classes:
G06F7/62; G06F11/10; H03K23/00; (IPC1-7): G06F11/10; G06F7/62; H03K23/00
Attorney, Agent or Firm:
Tono Kono



 
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