PURPOSE: To allow the counter to count up surely at an upper limit setting value or a lower limit setting value and to revise the setting value within the limits so as not to cause any hindrance even when the setting value in operation is revised by providing an upper limit setting means and a lower limit setting means setting respectively an upper limit and a lower limit with respect to a setting means in addition to a count setting means to the counter.

CONSTITUTION: The counter is provided with an upper limit setting value setting circuit 14 and a lower limit setting value setting circuit 15, and an upper limit and a lower limit with respect to the setting value are stored respectively by an operation switch to a control circuit 17 being a microcomputer controlling the input and output synchronously with a clock pulse of a clock generating circuit 16. When a setting value is set, e.g. to 200 in mistake in operation, the setting value 200 is disregarded, the counter is counted up at the upper limit setting value such as 150 and an ON signal is outputted. Furthermore, when the setting value is revised, e.g. to 0, the setting value is disregarded to 0 and the counter is counted up forcibly at the lower limit setting value, e.g. 50.