To accurately count clock signals at a high speed.

A counter circuit 11 is constituted of a 7-stage shift register circuit, consisting of 7 flip-flop circuits 121-127 that receive clock signals CL of count objects in parallel and an EXOR circuit 13 that feeds back an exclusive OR of 6th stage and 7th stage data of the shift register circuit to the 1st stage, a latch circuit 14 latches the output data of the counter circuit 11, and a data conversion circuit 15 converts the latched data into data which denote the number of times of stepping of output data of the counter circuit 11 and provides an output.