PURPOSE: To make normal operation without switching a special operation mode, by making the multiplex synchronizing operation into complete multiplex constitution, through the addition of a synchronizing circuit at the output side of a fast-in and fast-out type CUE.

CONSTITUTION: Fast-in and fast-out FIFO type CUEs 30, 31 and synchronizing circuits 40, 41 are provided between duplexed logical devices 10, 11 and 20, 21. The CUEs 30, 31 produces an output signal which takes the output signal of the devices 10, 11 as an input to other devices 20, 21. Further, the circuits 40, 41 are connected respectively at a synchronizing terminal, and the 1st and 2nd gate circuits and the shift register of serial parallel-out are provided in the circuits 40, 41. Further, the 1st gate circuit compares wither one of the outputs of the shift register with the synchronizing signal of the other systems, and when both the signals are read for display, the gate is opened. Moreover, the ready display signal is outputted with the 2nd gate for the 1st gate output for complete multiplexing.