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Patent Searching and Data


Title:
CURRENT MODE LOGIC CIRCUIT
Document Type and Number:
Japanese Patent JPH09200037
Kind Code:
A
Abstract:

To obtain a current mode logic circuit with a stable operation and a simple circuit configuration by providing a balancing resistor and an analog comparator to make the operating point of the current mode logic circuit stable.

When any of voltages at output terminals O1, O2 changes higher than an intermediate voltage VR, the higher voltage is fed to an inverting input terminal of a comparator circuit 20, from which a difference voltage with respect to the voltage VR is amplified to reduce a voltage applied to bases of transistors(TRs) 3, 4. Then the middle voltage in the signal amplitude at collectors of the TRs 3, 4 is increased Thus, a current flowing through a resistor 13 is increased to cause an increased voltage drop across resistors 11, 12, resulting that a base voltage of TRs 7, 8 is decreased. An output voltage is a voltage resulting from subtraction of a VBE from a base voltage of the TRs 7, 8, then an emitter voltage of the TRs 7, 8 at a middle level of the signal amplitude is reduced. Thus, the increase in the middle voltage is cancelled to make the operating point at an output stage stable.


Inventors:
KOGURE KAZUHISA
YAMAMOTO SATOSHI
OSADA HIROKAZU
YAMASHITA MASAHIKO
Application Number:
JP770496A
Publication Date:
July 31, 1997
Filing Date:
January 19, 1996
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03K19/086; H03K19/018; (IPC1-7): H03K19/086; H03K19/018
Attorney, Agent or Firm:
Teiichi