Title:
CURRENT STABILIZER
Document Type and Number:
Japanese Patent JPS59149407
Kind Code:
A
Abstract:
Between a first and a second power-supply terminal (6, 7) the circuit arrangement comprises a first circuit which comprises the series arrangement of a first resistor (1), a second resistor (2), a third resistor (3), the collector-emitter path of a transistor (T1) whose base is connected to a point between the first and the second resistor (1, 2), and a transistor (T2) arranged as a diode. Further, the arrangement comprises a second circuit which comprises the series arrangement of a load (5), the collector-emitter path of a transistor (T3) whose base is connected to the point between the second and the third resistor (2,3), and a resistor (4). In the case of supply-voltage variations the third resistor (3) limits the voltage variation across the second resistor (2) to a maximum value, so that the current (I2) in the second circuit a can be stabilized over a wider range of supply voltages.
Inventors:
BUORUFUDEIITORITSUHI GEORUGU K
Application Number:
JP1953984A
Publication Date:
August 27, 1984
Filing Date:
February 07, 1984
Export Citation:
Assignee:
PHILIPS NV
International Classes:
H03F3/343; G05F3/30; H03F3/34; (IPC1-7): H03F3/343
Attorney, Agent or Firm:
Akihide Sugimura