Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
DATA ARRAYING CIRCUIT
Document Type and Number:
Japanese Patent JPS59220836
Kind Code:
A
Abstract:

PURPOSE: To array data in desired format by adding the desired data format and a digit-by-digit shift value to data to be outputted to an external device, and controlling a shifting circuit and an output buffer associatively with each other.

CONSTITUTION: Data on a signal line 11 is inputted to a selector 1, whose output is inputted to the shifting circuit 2, the output of which is inputted to an output buffer 3. The shift amount supplied to the circuit 2 is stored in a shift value register 5, whose output is supplied to the circuit 2 and also supplied to a loading control circuit 6 which generates the loading signal of the output buffer 3. The output of a circuit 6 is inputted as the loading signal to the buffer 3. The output of a mode register 4 which holds a mode determination signal is supplied to a selector 1. Then when the output of the register 4 is 0, an unpacking mode is entered. Further, a signal P which indicates whether the high-order bits or low- order bits of the input data are to be unpacked is inputted as an input switching signal to the selector 1.


Inventors:
MIZUNO MASAKI
Application Number:
JP9468983A
Publication Date:
December 12, 1984
Filing Date:
May 27, 1983
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F7/00; G06F5/00; G06F7/76; (IPC1-7): G06F5/02
Attorney, Agent or Firm:
Toshi Inoguchi