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Patent Searching and Data


Title:
DATA COMMUNICATION SYSTEM
Document Type and Number:
Japanese Patent JPH0685874
Kind Code:
A
Abstract:

PURPOSE: To prevent noise from being mis-recognized to be a clock signal by sending a data signal synchronously with the clock signal sent via a clock signal line so as to attain high speed data communication.

CONSTITUTION: When a trigger signal is sent from a CPU1 to a CPU2 via a 1st trigger signal line 6, a data signal is sent from the CPU1 to the CPU2 via a 1st data signal line 3 synchronously with the clock signal. Conversely when the trigger signal 2 is sent from the CPU2 to the CPU1 via a 2nd trigger signal line 7, the data signal is sent from the CPU 2 to the CPU1 via the 2nd signal line 4 synchronously with the clock signal.


Inventors:
INAGAWA SHINICHI
MATSUDA SHOHEI
YAHAGI TOSHIO
Application Number:
JP25906992A
Publication Date:
March 25, 1994
Filing Date:
September 02, 1992
Export Citation:
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Assignee:
HONDA MOTOR CO LTD
International Classes:
H04L7/04; G06F13/40; H04L29/08; (IPC1-7): H04L29/08; H04L7/04
Attorney, Agent or Firm:
Toshihiko Watanabe