To obtain an improved data form conversion circuit, OAM fault management cell extract circuit and frame length fault detection circuit in which the circuit scale can be reduced.
In the circuit converting, e.g. an 8-bit parallel signal or a 16-bit parallel signal into a 48-bit parallel signal, a caption 1a is an FF group composed of 4 4-bit flip-flop circuits (FF), captions 2a-2e is FF group composed of two 4-bit FFs, captions 3a-3f are an FF group composed of two FFs with an enable terminal, and captions 4a-4e are a selector group composed of eight selectors. When the 8-bit or 16-bit parallel signal is converted into a 48-bit parallel signal in the circuit configuration above, 0 or 1 terminals of all the selectors are designated respectively by a mode selection signal and prescribed conversion processing is executed. The circuit needs few number of FFs, one kind of latching timing pulses is enough, and the circuit scale and configuration can be reduced and simplified.
SAKAHARA SHIGEHISA
TOYODA YOSHIMI
IMANISHI TAKESHI
