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Patent Searching and Data


Title:
DATA LINE DRIVE CIRCUIT
Document Type and Number:
Japanese Patent JPS6251092
Kind Code:
A
Abstract:

PURPOSE: To obtain the high potential of a data line and to perform a stable reading even when a power source voltage is lowered, by eliminating the substrate effect of an active load MOS transistor of the data line.

CONSTITUTION: In case of reading, a WE signal supplied to a terminal 45t is 'Hi', which is inverted by an inverter 44 to be 'Lo', supplied to respective the gates of active load MOS transistors 41 and 42 and both MOS transistors 41 and 42 are turned on. Since their operating points are selected in a triode area, both transistors 41 and 42 operate as resistors and an equivalent circuit becomes a state as shown in the drawing. As the active loads, P channel MOS transistors 41 and 42 are used and a substrate effect ΔVth is eliminated, thereby, when power source voltage VDD is 5V, electric potentials V21 and V22 of a data line d21 and a data line 22 are respectively enhanced to about 3.9V and about 4.1V.


Inventors:
NAKAGAWARA AKIRA
WATANABE KAZUO
KOBAYASHI YUKIO
Application Number:
JP19043385A
Publication Date:
March 05, 1987
Filing Date:
August 29, 1985
Export Citation:
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Assignee:
SONY CORP
International Classes:
G11C11/34; G11C11/417; (IPC1-7): G11C11/34
Domestic Patent References:
JP58114596B
JPS57117181A1982-07-21
JPS5942690A1984-03-09
Attorney, Agent or Firm:
Sada Ito