Title:
DATA OUTPUT BUFFER
Document Type and Number:
Japanese Patent JPH06350426
Kind Code:
A
Abstract:
PURPOSE: To obtain the data output buffer of a semiconductor memory device capable of minimizing the generation of ground noise by data transmitted onto the outer circuit device side through an output line. CONSTITUTION: The buffer is provided with a first input line 31 for inputting a true and false data, a second input line 33 for inputting compliment data, a pull-up transistor 38 connected between a first power source voltage source, an output line 37 and the line 31, a pull-down transistor 40 connected between a second power source voltage source, the output line 37 and the line 31, and a MOS transistor 42 controlling a current quantity supplied from the line 33 to the transistor 40 by the voltage of the line 37 so as to remove a noise signal included in output data of a low level signal generated at the line 37.
Inventors:
KIN SAIKIYOU
Application Number:
JP7225794A
Publication Date:
December 22, 1994
Filing Date:
April 11, 1994
Export Citation:
Assignee:
GENDAI DENSHI SANGYO KK
International Classes:
G11C7/10; H03K17/16; H03K17/687; H03K19/00; G11C11/409; H03K19/0175; (IPC1-7): H03K17/687; G11C11/409; H03K17/16; H03K19/0175
Domestic Patent References:
| JPH01228318A | 1989-09-12 | |||
| JPH0282714A | 1990-03-23 |
Attorney, Agent or Firm:
Yoshiki Hasegawa (3 outside)