To provide a data processing circuit with which the output does not contain noise even in changing the program.

The data processing circuit is provided with a program RAM 22 with a program stored therein, a coefficient RAM (new) 32 for storing a new coefficient after change in changing a coefficient, a coefficient RAM (old) 33 for storing an old coefficient before change, and arithmetic circuitry 23 which operates according to the program and the coefficients. Also, the data processing circuit is provided with a program counter 27 for reading the program in the program memory 22 and the coefficients in the coefficient RAMs 32, 33, and a coefficient interpolating means 40 which produces the coefficients sequentially changing from the coefficient in the coefficient RAM (old) 33 toward the coefficient in the coefficient RAM (new) 32, and which outputs them to the arithmetic circuitry 23. Then, both of the coefficient RAM 32, 33 are rewritten to the new coefficients both in the program change and the coefficients change, and thereby the noise is prevented in changing the program.