Title:
DATA PROCESSING SYSTEM HAVING ON-DEMAND WRITE THROUGH CACHE PERFORMED IN FORCED ORDER
Document Type and Number:
Japanese Patent JPH08115289
Kind Code:
A
Abstract:
To improve the efficiency of a system by using an on-demand write through cache technique.
A data processing system incorporates a processor, a system memory, one or more input-output channel controllers(IOCC), a system bus connected to the processor, a memory and an IOCC for instruction, address, and data used for the communication between respective components of the system. Each IOCC contains cache storages at every page having many lines. Each page of a cache has several attribute bits containing W bits, I bits, M bits, and attribute bits exclusively used for pages. The W bits control write through operation and the I bits control cache inhibition. The M bits control the consistency of the memory.
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Inventors:
RABI KUUMAA ARIMIII
JIYON SUCHIIBU DOTSUDOSON
GAI RIN GASURII
JIERII DON RUISU
JIYON SUCHIIBU DOTSUDOSON
GAI RIN GASURII
JIERII DON RUISU
Application Number:
JP23640295A
Publication Date:
May 07, 1996
Filing Date:
September 14, 1995
Export Citation:
Assignee:
IBM
International Classes:
G06F12/08; G06F13/12; (IPC1-7): G06F13/12; G06F12/08
Attorney, Agent or Firm:
Kiyoshi Goda (2 outside)