PURPOSE: To prevent the same output device from being accessed by plural computers by transmitting data while controlling a line between a buffer device and an I/O device mounted on each computer side.
CONSTITUTION: When data are transmitted from an input device 310 to each computer side, a signal 130 opening a gate 3100 is outputted from a bus controller 5. At that time signals 131W13N opening output gates 431W43N in buffer devices 41W4N are not outputted. Consequently input gates 421W42N are opened and data are written in specific addresses in buffer memories 411W41N. When the data are outputted from a buffer device 41 of a computer 1 to an output device 311, for example, signals opening the gates 431 and 3110 respectively are outputted from the controller 5. At that time, the gate 421 of the device 41 is closed and the input gates 422W42N of other buffer devices are opened. Thus the data in the device 41 are transferred to the device 311 and the buffer devices 42W4N.
| JPS62144263 | DATA INPUT AND OUTPUT DEVICE |
| JPS6057779 | [Title of the Invention] Output buffer circuit |
| JPS61286962 | POWER SOURCE INTERLOCK SYSTEM |
SHIMOYAMA KAZUHIKO
OKAMOTO TADASHI
AZUSAWA NOBORU
YOSHIDA OSAO
SAITOU YUTAKA
SAKURAI TAKAKAZU
KITANI SUSUMU
KIKUCHI YUUJI
UEKANE YOSHIHIRO
| JPS585822A | 1983-01-13 |