PURPOSE: To decrease the number of ROMs by inhibiting an auxiliary processor from operating substantially as NOP when an unmounted ROM is accessed.
CONSTITUTION: A basic processor 1 is for processing information and the auxiliary processor 2 assists the basic processor 1 in functioning to perform high-speed processing and down not operate at all when instruction fetch signal lines are all at a high level. Then, ROMs arranged in plural arrays are used to control the basic processor and auxiliary processor connected in a space selected by the basic processor 1. A column selecting circuit 7 selects one of the ROMs. A pull-up resistance 6 fixes output signal lines of plural columns of ROMs in for auxiliary processor control at the high level unless of some of plural columns of ROMs for auxiliary processor control are arranged.