Title:
DATA PROCESSOR
Document Type and Number:
Japanese Patent JP2012039575
Kind Code:
A
Abstract:
To provide a data processor that is reset based on a received signal.
A reception circuit 10D receives a signal. A function processing part 40D processes a signal received by a reception circuit 10D. A monitor circuit 20D outputs a reset release state of a reset signal when predetermined data patterns are continuously extracted by a predetermined number from a signal received by the reception circuit 10D. A reset control circuit 30D reset-releases the reception circuit 10D based on the reset-release state of the reset signal.
Inventors:
ICHIZUKA HIROYUKI
KUNIHIRO YUKIO
TAKAYAMA HIROSHI
KUNIHIRO YUKIO
TAKAYAMA HIROSHI
Application Number:
JP2010180539A
Publication Date:
February 23, 2012
Filing Date:
August 11, 2010
Export Citation:
Assignee:
FUJITSU ADVANCED ENG LTD
International Classes:
H04L69/40; H04L1/08; H04N1/00
Domestic Patent References:
| JP2007080244A | 2007-03-29 | |||
| JP2007259339A | 2007-10-04 | |||
| JP2006042081A | 2006-02-09 | |||
| JPH1188352A | 1999-03-30 | |||
| JP2005065216A | 2005-03-10 | |||
| JPH1188352A | 1999-03-30 | |||
| JP2005065216A | 2005-03-10 | |||
| JP2007080244A | 2007-03-29 | |||
| JP2007259339A | 2007-10-04 | |||
| JP2006042081A | 2006-02-09 |
Attorney, Agent or Firm:
Akihiko Watanabe
Keiko Shigehisa
Keiko Shigehisa
Previous Patent: VOLTAGE-CONTROLLED OSCILLATOR
Next Patent: COMMUNICATION APPARATUS AND COMMUNICATION METHOD
Next Patent: COMMUNICATION APPARATUS AND COMMUNICATION METHOD