Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
DATA PROCESSOR
Document Type and Number:
Japanese Patent JPH08110804
Kind Code:
A
Abstract:

PURPOSE: To effectively utilize CPU resources by providing a CPU exclusive for normal instructions and a general CPU.

CONSTITUTION: When the CPU 1 exclusive for normal instructions reads out a special instruction while reading out a user program, a request flag indicating that the special instruction is read out is set in the flag area, etc., of a work memory 6. A CPU 2 checks the request flag throughout program execution to judge whether or not the request flag is set, and executes the requested special instruction when the request flag is set. After the special instruction is executed, the general CPU 2 sends a report on the completion of processing to the CPU 1 exclusive for normal instruction to make the CPU 1 exclusive for normal operation execute the normal instructions, and it is judged whether or not the program execution is completed by one scan. When the execution has been completed by one scan, peripheral processing is performed successively.


Inventors:
ISHIKAWA HITOSHI
Application Number:
JP24511894A
Publication Date:
April 30, 1996
Filing Date:
October 11, 1994
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
OMRON TATEISI ELECTRONICS CO
International Classes:
G06F15/16; G05B19/05; G06F9/50; G06F15/177; (IPC1-7): G05B19/05; G06F15/16
Attorney, Agent or Firm:
Shigenori Wada