PURPOSE: To decrease the frequency of interrupt processing at the time of data reception from a CPU and to shorten the processing time by outputting an interrupt signal to the CPU after received data are gathered by data width that the CPU handles.

CONSTITUTION: This data receiving device is equipped with a data latch and control circuit 103 which outputs the interrupt signal to the CPU 104 after the received data are gathered by the data width that the CPU 104 handles. A transfer source 101 and the data latch and control circuit 103 are linked on a handshake basis. For example, when data sent from the transfer source 101 has 8-bit width and the CPU 104 is of 16-bit width constitution, data are latched by the bit width (16 bits) that the CPU 104 handles and then read in by the CPU 104. Consequently, generating circuits for interrupts due to data reception are decreased and the data can be received fast.