Title:
DATA RECORDER AND DATA RECORDING METHOD
Document Type and Number:
Japanese Patent JP3937484
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To make a data recoder small in size and low in manufacturing cost.
SOLUTION: Delay quantity is read out by giving an address corresponding to modulation data to a storage means for storing delay quantity by which positions of a rising edge and a falling edge of a recording pulse corresponding to modulation data recorded in a phase variation disk, and recording compensation is performed by delaying a rising edge and a falling edge of a recording pulse. In this case, a rising edge and a falling edge of data are detected by AND gates 31 to 34 and NOR gates 35, 36, and an address is given to the storage means from a DFF(D flip-flop) 116 only when a rising edge and a falling edge of data are detected.
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Inventors:
Masaaki Hara
Nagakita Hiroki
Nagakita Hiroki
Application Number:
JP24588096A
Publication Date:
June 27, 2007
Filing Date:
September 18, 1996
Export Citation:
Assignee:
ソニー株式会社
International Classes:
G11B7/0045; G11B11/10; G11B7/00; G11B11/105; G11B20/10; (IPC1-7): G11B7/00; G11B11/10
Domestic Patent References:
| JP8147695A |
Attorney, Agent or Firm:
Yoshio Inamoto