Title:
DATA SEPARATOR FOR FLOPPY DISK
Document Type and Number:
Japanese Patent JPS6018866
Kind Code:
A
Abstract:
PURPOSE:To lock precisely in phase and to increase the peak shift margin by switching filters after detecting that the phase shift amount is reduced less than a certain set level in a phase synchronizing process. CONSTITUTION:A CLP is equal to a signal corresponding to a clock pulse of an input data pulse with its width equal to the difference of phase between the input data pulse and a window pulse and can be easily produced from a phase comparison signal and the window pulse through a VFO circuit. A gate 10 transmits the CLP signal only when a high-speed filter is selected. A pulse width inspecting circuit 12 checks the pulse width of the CLP signal. The pulse width of the CLP signal is gradually reduced as the phase synchronizing process advances. When this width becomes less than a set level of the circuit 12, the output of the circuit 12 is kept at a low level. When this low level lasts longer than the time corresponding to M bytes, an M-byte detecting circuit 13 inverts its output to a high level and switches an LPF.
Inventors:
KAWASAKI TAKESHI
Application Number:
JP12664883A
Publication Date:
January 30, 1985
Filing Date:
July 12, 1983
Export Citation:
Assignee:
SUWA SEIKOSHA KK
International Classes:
G11B20/14; G11B20/10; (IPC1-7): G11B20/14
Attorney, Agent or Firm:
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